ICs or integrated circuit microchips are the driving force that fuels innovation across virtually every industry. However, the high cost of designing ICs, combined with significant manufacturing shortages, has stifled innovation over the last two years.
Organizations across the globe have been seeking a way to improve the efficiency and speed of the chip production process. Currently, the time it takes to create a new IC block design and navigate the entire production process can range from three to 24 months.
Fortunately, GBT Technologies has begun to submit patented solutions that can significantly improve the IC chip design process.
The standard IC design process is inherently flawed.
After an IC design is completed, developers conduct thorough testing to ensure that the chip adheres to design rules (DR). The IC is funneled into a redundant design process if these rules are not met. This reworking can add months or years to the design process, which delays the manufacturer’s ability to scale.
Each IC foundry has thousands of unique DR that govern its manufacturing process, making matters worse. This lack of uniformity creates entry barriers for new designs, hindering innovation.
GBTT is developing a solution under the internal code name “Magic2.” The project includes eight software applications that complement one another to speed up the IC development cycle significantly. In addition, Magic2 can improve other aspects of the IC design process, including production, physical layout, and manufacturing.
All software within the Magic2 project is designed as both productivity and stand-alone tools. This approach means that IC manufacturers can rapidly deploy these assets to increase efficiency and save time.
Some of the applications include additional plug-ins to integrate with standard IC Layout tools. Magic2 also consists of an AI system that services each of the eight tools within its domain.
Magic2 leverages the following software applications:
Epsilon is a groundbreaking real-time reliability verification software. The program conducts reliability analysis of chips during the IC layout design phase of the development process.
The software can find problems as they are created and make simple corrections automatically. This automation allows manufacturers to reach the signoff phase with far fewer issues.
Specifically, Epsilon can auto-correct issues associated with EM (electromigration), SH (Self-Heat), IR Drop, and other phenomena. Epsilon can not only streamline the path to the signoff phase but also enhance the overall design quality as well.
Magic2’s Omega software directly compliments the Epsilon RV technology. Omega is an automatic design rule correction software that analyzes the physical IC layout block. It reads the process rule deck and automatically remedies any DRC violations.
Delta software is designed to facilitate IC manufacturing process migration. It allows manufacturers to port existing IC designs automatically from one process to another. When used in conjunction with other programs in the Magic2 suite of technologies, Delta can break down barriers to entry for emerging manufacturers.
Zeta addresses IC manufacturing rules as they pertain to the Layout Block. The Zeta software can automatically detect and correct any rule violations, which will reduce delays during the IC development process.
Sigma provides automatic correction of IC Layout Blocks as well. However, this program deals specifically with LVS Decks and GDSII. It also utilizes Oasis data to make schematic fixes to the physical layout of IC designs. The program can re-wire nets, maintaining DRC, RV, and DFM compliance.
Kappa software is another integral tool designed to reduce barriers to entry. It automatically converts existing traditional manufacturing designs to the more robust Multi-Planar architecture.
Magic2’s Phi software reads a circuit schematic and automatically generates the block in a given process. Phi’s blocks are compliant with DFM, RV, DRC, and LVS. When deploying Phi, the user selects an existing block or creates one from scratch.
The eighth and final component of Magic2 is Tau. The Tau software is an IC Layout Compactor and Optimizer. This tool minimizes the area of an existing layout block, which results in increased performance and a higher silicon yield.
The Magic2 suite of software is targeted to be designed to speed up the IC production process. The collective of programs also makes the production of each chip more efficient by increasing silicon yield and reducing block layout.
While the various software that is included in Magic2 improves chip production in several ways, these benefits are evident during two core aspects of the development process:
Perhaps the most significant benefit of the Magic2 project is that it allows manufacturers to circumvent the redundant standard design and development process. The traditional design pattern involves four stages, which are as follows:
- Fail Detection/Manual Fix
- Repeat until IC passes
By using Magic2, IC manufacturers can cut the process down to two distinct phases. They can create a chip and then allow the Magic2 suite of programs to perform a check/auto fix on the design.
Magic2 works similarly to a “spell-check” function on word processors in that it automatically detects and rectifies any design flaws. This approach allows manufacturers to reduce the IC development lifecycle significantly.
Cumulatively, the Magic2 tools can generate a total time and cost savings from 40% to as much as 97%.
Magic2 expedites the design check and correction process and expedites scaling capabilities. With Magic2 tools, IC scaling can be performed in a matter of hours, not years.
For instance, let’s imagine that a leading US-based tech and phone company is currently developing a new IC for a smartphone. They are scaling down an IC from 10nm to 7nm and expect the project to take approximately nine months. A total of 500 designers are working on the project.
With Magic2, the organization could experience cost and time savings of 60-70%. The Magic2 software suite will also allow them to improve their speed to market, thereby letting them capitalize on a lucrative opportunity within their industry.
To date, Magic2 has filed four patents and intends to file four or five additional patents by year’s end. The project has an estimated completion timetable of 9-12 months. Once the project is live, it will be positioned to disrupt the multi-billion dollar IC manufacturing industry.
The companies that adopt the Magic2 software the soonest will have a distinct advantage over their top competitors. They will be able to produce better ICs faster and with less capital than other manufacturers, which will allow them to dominate the IC market.
Dr. Danny Rittman
CTO- GBT Technologies Inc.